Talk:Physical Address Extension
| This is the talk page for discussing improvements to the Physical Address Extension article. This is not a forum for general discussion of the article's subject. |
Article policies
|
| Find sources: Google (books · news · scholar · free images · WP refs) · FENS · JSTOR · TWL |
 | This article is rated C-class on Wikipedia's content assessment scale. It is of interest to the following WikiProjects: | |||||||||||||||||||||||||||||||||||||||||||
| ||||||||||||||||||||||||||||||||||||||||||||
 Archives (Index) |
|
This page is archived by ClueBot III.
|
PAE Xeon only
editIt should be made clear the only IA-32 processor which supported Physical Address Extension as defined by Intel was Xeon. PAE requires BOTH 36 address registers AND 36bit data bus for RAM.
All IA-32 processors had at most a 32bit data bus. 36 address registers only allows paging - it is not PAE support.
Only Xeon had 36bits for RAM. Xeon supported 8GB RAM total. The 8GB was split into 2x 4GB memory banks accessed one bank at a time. The 32bit + 4bit bus allowed a segment selector. (Xeon was technically a 36bit CPU).
Onzite. (talk) 23:25, 10 May 2020 (UTC)
- No, as that's rubbish. Where's the definition of that per Intel? The article currently has it right Physical Address Extension#Hardware support - the chipset and motherboard etc have to also support 36 bit, which I know myself certainly some non-Xeons did. Widefox; talk 22:09, 1 September 2020 (UTC)
First Linux kernel to support PAE
editThe section says 2.3.23 but under the old scheme odd numbers were development kernels (2.2 series was the release, 2.3 was concurrent and the development space for what would ship as 2.4). Would probably make sense to also mention which kernel was the first to ship with PAE, since no released distro would use a development kernel. --97.115.191.42 (talk) 03:44, 1 May 2022 (UTC)