Talk:Front-side bus

74.128.236.56 removed their comment

—Preceding unsigned comment added by 74.128.236.56 (talk) 23:05, 11 January 2010 (UTC)

The above signed fragment due to 74.128.236.56 removing their own comment [1] (2010 Jan 11; 22:06 UTC) that had been signed by SineBot.— al-Shimoni (talk) 02:07, 2 August 2020 (UTC)

Non-FSB CPUs

Please do not add in processors that do not use a Front Side Bus, they are not relavent to the FSB chart. —Preceding unsigned comment added by 69.248.120.203 (talk) 14:21, 9 May 2010 (UTC)

MT/s vs MHz: The debate rages on, but why?

I just posted a discussion over on the Intel Core 2 discussion page about this -- why are we listing front side buses in megatransfers per second (MT/s)? This article states (incorrectly, I might add) that, quote; "Many manufacturers today publish the speed of the FSB in megatransfers per second (MT/s), not the FSB clock frequency in megahertz (MHz)." No manufacturer lists their front side bus in MT/s! They may list the speed of their newfangled, high speed, point-to-point interconnects as MT/s... but no one measures their FSB in MT/s! Look at any retail website selling these chips, or even retail websites selling complete systems. Why not take it straight from the horse's mouth, from Intel's on-site documents [2]? A Pickle (talk) 04:35, 29 June 2009 (UTC)

Becaus ethey use fake MHz, they do not use the MHz the Bus runs at but instead the data rate (bus clock x data blocks transferred per clock). In effect they use MT/s but state is as MHz because it sounds and sells better to those who do not know much about computers. --Denniss (talk) 17:53, 29 June 2009 (UTC)

FSB/Core ratio clock multiplier

What I need to know is :which is better, makes for a faster computer that does not sieze up, a high or low fsb/core ratio-clock multiplier? I get confused between the explanations using one concept or the other.

George Staffa (talk) 02:00, 11 December 2008 (UTC)

Neither - the two parameters are basically opposed to each other. If you have a machine with a low core:bus ratio (e.g. 1:1) you won't stall the processor but technical limitations mean that you can't ramp up the clock speed. Such a chip might never stall but won't run faster than a couple of hundred MHz. If you have a chip that runs it's FSB at that same speed but its core at something faster you aren't going to lose anything. Even in the worst possible case the chip will still have the same speed as the 1:1 processor, but on average it will be substantially faster, even if it does stall occasionally.

Current microprocessor developments are basically taking the high core:bus ratio approach for this reason, but are focussing on introducing ways to mitigate the effects of stalling. There are two main approaches. The first is the obvious - use faster/smarter caches to reduce the amount of cache misses that occur. The other approach is to design your cores so that they can quickly switch to another task if a stall occurs so that they can continue to do something constructive while they await fresh data from memory. This is what Intel's Hyperthreading was all about and is an approach taken to its logical conclusion with Sun's Niagara CPUs. There is not fundamental reason why both approaches can't be combined but limited chip areas and R&D budgets tend to lead to a primary focus on one idea or the other. —Preceding unsigned comment added by CrispMuncher (talk • contribs) 11:15, 11 December 2008 (UTC)

Yes

having L2 cache on the processor die itself, this

It will be better if it changes to like this :

having L2 cache on the die of the processor itself, this —Preceding unsigned comment added by 60.50.228.27 (talk) 02:12, 23 June 2008 (UTC)

Gramatical error?

having L2 cache on the processor die itself, this

processor die? I'm no expert on buses, but either this was not intentional or this para graph needs changing.

No, it's not an error- there is, as far as I know, actually a thing called the processor die.--Airplaneman (talk) 19:58, 29 May 2009 (UTC)

No

No, this is not an error. Die is waver texture in circuits.

Asynchronous FSB/SDRAM bus speeds

"Similar to the PCI and AGP buses, however, the memory bus can sometimes also be run asynchronously from the front side bus." A good point is made here, but the text only mentions bus ratio settings. Some chipsets allow different memory bus speed settings; such as SDRAM=FSB or SDRAM=FSB+33. It would be nice to see that in the text also...

FSB chart

There seem to be quite a few FSB800 Pentiums flying around these days: the article is either outdated or needs an explanation. --Tom Edwards 20:33, 17 July 2005 (UTC)

Can u explain me how to do overclocking in a P4 2.0 system with 845 mother board...

please tell me how to overclock the system..

Try a forum

---

Athlon XP

Weird, my PC with an Athlon XP processor only supports FSB 100/133/166 o.Ô

I have an Athlon XP 2600, which only goes upto 166mhz front side bus. This is thus 333MHz when doubled. I just recently put new RAM in the machine that is DDR-400 (400MHz memory speed when doubled, as per usual DDR semantics). My BIOS supports asynchronous bus speeds for FSB and RAM. This article seems to suggest that I should underclock my RAM to 333MHz to match the FSB of the CPU, without being explicit. What's the proper thing to do in my case, and can the article be expanded on to eliminate this ambiguity? 86.139.204.252 21:03, 3 May 2006 (UTC)

Your XP runs with 166 MHz FSB and your memory with max 200 MHz. IF you have an nForce2 system then use both with 166 MHz unless you want to OC your CPU, using different speed on FSB and memory slows own your system. Most other Sockt-A system should run fine with memory clocked higher than FSB. --Denniss 22:59, 3 May 2006 (UTC)

abbreviation

wiki seaching fsb didnt point to this article

there are other uses to FSB. --202.71.240.18 07:11, 13 July 2006 (UTC)

speed examples a bit dated

in the CPU section: "For example, a processor running at 550 MHz might be using a 100 MHz FSB." These speeds kind of date the article a bit don't you think. Should moore's law be applied here?

Transfers 4 times per clock?

From the first note in the "Some sample FSB frequencies and bandwidths" table: "... and Intel Core 2 processors use a front side bus that transfers data four times per cycle".

Isn't this misleading? From my understanding, the Intel bus usn't really "quad pumped" (whatever that really means) or transferring data four times per clock cycle. Yes, it is transferring 4 times as much data as a system transferring one set of data per clock, but it does this by using pairs of memory DIMMs (128-bit memory bus width, compared to the standard 64-bit), and double data rate (transferring data on both the rising and falling clock edges). That way, the signals don't have to change state faster than the clock already does, so you get maximum data transfer with existing bus technology. The cost is that you need more wires on the mother board, and you need to use pairs of memory modules (or suffer massive performance penalties).

There seems to be a lot of confusion over this. I've seen web pages with sinusiodal clocks, transferring data at the peaks and also the zero crossings of the sine wave! Please! So I'd echo the calls for decent diagrams on how this works. --Mike Van Emmerik 00:49, 6 October 2006 (UTC)

Intel "quadpumped" (I really don't like this word) FSB transfer 4 packets of data regardless of what memory is installed (even with SDR-SDRAM).

Interesting, and I agree with "4 packets of data" or similar, but what's said is "4 times per cycle" implying that on a processor with a "1066MHz FSB" there are four transfers (presumably, evenly spaced) per 267MHz clock cycle, which by my understanding is not true. (I believe that there are two transfers, evenly spaced, in each 267MHz cycle, each of these from two separate DIMMs.) In other words, there is a doubling in time, and a doubling in data width, not a quadrupling in time, as is implied by the article as currently written. --Mike Van Emmerik 10:02, 8 October 2006 (UTC)

4 pieces of data are trasnferred even with a single memory stick installed as this even works with single-channel memory. I'm not really the expert on how and when data is transferred but I think to remeber it will be transferred at the raising and the falling clock signal as well as on the peak ond the bottom. Try a gogle search to find out more. --Denniss 09:47, 9 October 2006 (UTC)

This is how it's done: Each bus clock cycle the 64-bit databus can transfer 4 packets. The bus clock is 266mhz on modern intel parts. This provides for an effective data rate of 1066mhz, 64bit transfers, resulting in peak throughput of 8B * 1.066GHz = 8.5GByte/s. This has nothing to do with the memory speed, that is a totally different bus.

Isn't that called "Quad Data Rate" (QDR)? --202.40.137.202 03:51, 12 April 2007 (UTC)

Don't you confuse the FSB with DDR? The DDR(2) memory can do only two transfers per clock indeed. But FSB can do 4. Their coupling (either by entailing two memory banks/channels for full utilization or reducing FSB speed) is another story. --Javalenok (talk) 08:26, 6 July 2009 (UTC)

80.191.148.141 02:33, 13 October 2006 (UTC)

I've seen many pages on Internet that say Hypertransport 2GHz or 2000MT/s.

Do they refer to Hypertransport 1GHz Version. If your answer is (yes),

explain it and write about Intel's 1066 MT/s FSB.

In fact , write what we need to compare two FSB. (Hyperthreading , Intel's FSB)

( 1000MHz,1066Mhz or 8000MB/s,8533MB/s or 2000MT/s,1066MT/s )

All beginners like me are always confused and give their money to these companies.

I think this Article want a section about bus width. ( I mean 32 bit or 64 bit ,... )

Also, explain more about the 14400MB/s Bandwidth You've written for Hypertransport.

Finally, Please explain about FSB bandwidth increase. Will an Amd 3000+ (1800 MHz)

work better with Hypertransport 1GHz rather than Hypertransport 800MHz.

Beacuse both of them have 200 MHz system clock.

FSB Memory Bus Ratio

The article asserts:

For example, the current Core 2 architecture seems to perform better at a 1:1 ratio (that is, FSB1066 - true 266 MHz * quad-pumping - and DDR2-533 - true 266 MHz * double pumping) than a 4:5 ratio (using DDR2-667), but stepping it up to a 2:3 ratio (DDR2-800) or higher seems to increase performance over a 1:1 ratio.

Although no justification or reference is provided.

All-in-all the FSB topic is very important and this article really needs to be rewritten by someone with a deep technical understanding and practical experience in overclocking.

Removed

I removed this from the article because I don't think it directly adds to the article, but we might want to put it somewhere else so I put a copy here.

Three recent bus technologies are GTL+, EV6, and HyperTransport. Each bus is unique in how it moves data within the system between the CPU and devices.

GTL+/AGTL+ Bus

• Designed by Intel for the Pentium Pro, Pentium II, and Pentium III CPUs, as well as Xeons based on these cores (GTL+)
• Redesigned for the Pentium 4 as well as Xeons on the same cores (AGTL+)
• So-called because it uses GTL+ signalling
• VIA's C3, C7, and Epia CPUs use these buses and are often interchangeable with Intel CPUs
• A "shared" bus, meaning that all CPUs compete over the same physical connection for the bus' bandwidth.

EV6 Bus

• Designed by DEC (now part of HP) for use with their Alpha EV6 CPUs
• Licensed by AMD for their Athlon and Athlon XP line of CPUs
• A point-to-point protocol connecting each CPU to the northbridge, meaning that each CPU has a dedicated connection to the device.

HyperTransport

• Designed largely by AMD in conjunction with the HyperTransport Consortium
• A point-to-point serial connection used by AMD for their Athlon 64, Athlon FX, Athlon X2, and Opteron processors.
• Not technically a front side bus.
• The HyperTransport connection connects AMD CPUs to the rest of the system. Also, these CPUs use it as the baseline to which the internal clock multiplier is applied. Both of these functions were traditionally performed by the frontside bus. On AMD-64 CPUs, the frontside bus, which connects the CPU to the northbridge, has been removed in favor of an on-die memory controller which communicates with RAM directly.

removed

This is a really nicely formatted table, but does it really add to the article on FSB? Is it too Intel-centric? I removed it but copied it here because it has such nice format.

Well, if this term is coined and generally used by Intel, it seems not surprising that it is Intel centric. Perhaps we need to clarify if it had uses outside of Intel and clone makers. W Nowicki (talk) 19:49, 27 May 2011 (UTC)

re:removed

Why is it too intel-centric, when AMD products had been added into discussion? —Preceding unsigned comment added by 60.50.228.27 (talk) 02:14, 23 June 2008 (UTC)

Some sample FSB frequencies and bandwidths

Processor Class	FSB Frequency	FSB Type	Theoretical Bandwidth
Pentium II	66/100 MHz	GTL+	533/800 MB/s
Pentium III	100/133 MHz	GTL+	800/1066 MB/s
Pentium 4*	100/133/200 MHz	AGTL+	3200/4266/6400 MB/s
Pentium M*	100/133 MHz	AGTL+	3200/4266 MB/s
Pentium D*	133/200 MHz	AGTL+	4266/6400 MB/s
Pentium 4 EE*	200/266 MHz	AGTL+	6400/8533 MB/s
Intel Core*	133/166 MHz	AGTL+	4266/5333 MB/s
Intel Core 2*	166/200/266 MHz	AGTL+	5333/6400/8533 MB/s
Xeon - P6 core	100/133 MHz	GTL+	800/1066 MB/s
Xeon* - Netburst core	100/133/166/200/266 MHz	AGTL+	3200/4266/5333/6400/8533 MB/s
Xeon* - Woodcrest core	266/333 MHz	AGTL+(with Dual Independent Buses)	17066/21333 MB/s
Athlon/Duron**	100/133 MHz	EV6	1600/2133 MB/s
Athlon XP/Sempron**	133/166/200 MHz	EV6	2133/2666/3200 MB/s
Athlon 64/X2/Opteron***	600/800/1000 MHz	Hypertransport	7500/12800/14400 MB/s
PowerPC 970****	450/500/625 MHz	Elastic	7200/8000/10000 MB/s
Notes: * - Pentium 4, Pentium M, Pentium D, Pentium EE, Xeon, Intel Core, and Intel Core 2 processors use a front side bus that transfers data four times per cycle ** - Athlon and Athlon XP processors use a front side bus that transfers data twice per cycle (Double data rate) *** - Athlon 64, FX, and Opteron processors have a memory controller on the CPU die, which replaces the traditional FSB. The bus specifications given here are for the HyperTransport link and memory bandwidth. **** - PowerPC 970 processors use a front side bus that transfers data twice per cycle (Double data rate)

If the PowerPC 970 has a FSB DDR, how does it get higher transfer speeds at a lower clock than other DDR FSBs? Or maybe I'm confused about that. - MSTCrow 16:36, 29 October 2006 (UTC)

I think the speed entries for it are wrong. According to PowerPC 970, the FSB runs at half the clock speed, and clock speed varies from 1.6GHz to 2GHz, so the FSB should be 800-1000MHz, not 450-625MHz as is in the table. One of these is wrong, and as you point out a discrepancy in the table data, I'm inclined to believe it's the table. JulesH 09:43, 9 December 2006 (UTC)

Info Box?

Does the infobox at top right look right to people? (I can't decide so I'm not touching it for now.) RJFJR 11:59, 28 October 2006 (UTC)

I've removed the infobox, because it just doesn't seem appropriate to this article. It's designed for describing particular bus designs, not the logical purpose that a bus may serve, which is what this article is about.

As an example of the problem this causes, the box said width was "32 or 64 bits", whereas an FSB can really be any size. The FSB on a 286, for example, is 16 bits. The FSB on a Core 2 Duo is 128 bits, I believe (i.e., it has 2 independent memory access channels of 64 bits each). As somebody has mentioned below, some processors have serial interfaces as part of their FSB as well. —The preceding unsigned comment was added by JulesH (talk • contribs) 09:33, 9 December 2006 (UTC).

Serial FSB

How do I include serial into the infobox, as Hypertransport can be serial in nature? Also, I think the FSB can be a minimum of 2 or 4 bits in width. Thanks. - MSTCrow 16:34, 29 October 2006 (UTC)

"Most motherboards allow overclocking?"

Near the end of the article, under "Overclocking," there is a sentence that reads: "Most motherboards allow the user to manually set the clock multiplier and FSB settings by changing jumpers or BIOS settings."

Where is the source for this? The last time I checked, most PCs were bought pre-assembled and preloaded with software, from companies such as Dell, HP, eMachines, etc. The majority of these PCs and motherboards within DO NOT allow you to change the FSB, much less multiplier. Perhaps a change is needed? The only motherboards that enable one to change the FSB and multiplier settings are chips purchased for custom-built computers, which represent a minority in the PC world. Thoughts? Opinions? -- Punchinelli 19:37, 2 November 2006 (UTC)

Update: I added and edited some info in the aforementioned Overclocking section to yield a more accurate representation of the amount of overclockable motherboards. Punchinelli 21:49, 14 November 2006 (UTC)

Webopedia?

That article is not much more than a sentence, I do not believe that it would really help unless someone disagrees with me. VentusIgnis 13:18, 4 March 2007 (UTC)

"Frontside" versus "Front side"

Frontside - please check any dictionary to see that there is no such word in English. It is "Front side bus". --Kubanczyk 09:10, 24 September 2007 (UTC)

Agreed. Also see the requested move below back to the pre-hyphenated spelling to match sources. W Nowicki (talk) 18:14, 27 May 2011 (UTC)

Shonky math, or missing precision?

The MT/s is affected by how many ticks are performed for each mhz, so if a motherboard has a 266MHz FSB and performs 4 transfers per clock tick, it has a total data transfer rate of 1066 MT/s. That is what the manufactures give as the speed of the FSB. Intel calls this technique which has 4 ticks per cycle Quad Pumping.

266 * 4 = 1064, not 1066. Should that be 266.5MHz, or is the 1066 MT/s wrong? —Preceding unsigned comment added by 59.167.247.10 (talk) 05:48, 10 December 2007 (UTC)

Missing pieces

It seems like this article is missing something. In the "pros and cons" section, it talks about the FSB like there are alternatives to it, but in the article above that, it talks as if there isn't any other way for the memory/system components/northbridge to communicate with the processor. This definitely needs to be fixed, because this reads sort of like a half-article right now. Like a lot of stuff was cut out of the article that made it make sense at some point in the past. (Some of which seems to be here on the talk page.) RobertM525 (talk) 01:40, 15 December 2007 (UTC)

That entire section needs rewriting and sourcing as it currently reads like a personal analysis. The section should be titled something like "Criticism" or "Obsolescence". With regard to AMD specifically, the alternative being implied is HyperTransport. Ham Pastrami (talk) 17:17, 15 December 2007 (UTC)

System Bus

I haven't found much in the way of a formal definition of "system bus". I *think* that "system bus" is the same as "fsb", but I'm not sure. Can anyone address this?--75.152.173.147 (talk) 18:50, 23 September 2008 (UTC)

They are pretty much the same. Technically, "FSB" should be a subsection in an article titled "system bus", as "system bus" is the generic term and "FSB" is Intel terminology. Rilak (talk) 08:34, 24 September 2008 (UTC)

I've seen the term "PSB" (processor side bus) sporadically around the internet, with inconsistent definitions. What is the difference, if any, between "PSB" and "FSB"?132.38.190.10 (talk) 19:30, 29 July 2009 (UTC)

Well it has now been about two years and this needs to be revisited again. Related to the above discussion about being "Intel centric", adding AMD info that is Intel compatible is only one small aspect of the issue. Computers had system busses for decades before the personal computer. So I propose to develope the system bus article into one about the generic concept and keep this one specific to the Intel implementation of this concept. W Nowicki (talk) 17:43, 18 May 2011 (UTC)

Integrated memory controllers change the FSB story.

With 2009's processors such as AMD Athlon II/Phenom II and Intel's Nehalem microarchitecture, the northbridge no longer contains the memory controller, this function has moved into the CPU package. This substantially changes the character of the front-side bus in terms of system performance. Perhaps this article should be updated to reflect this. See Intel X58 for an example of this sort of architecture.

Burt Harris (talk) 17:41, 4 November 2009 (UTC)

Transfer rates

Something's very wrong with the "Transfer rates" table. I have a Core 2 Duo CPU here, it has an FSB of 800MHz (or MT/s), the table says 10 times more or so.. —Preceding unsigned comment added by 85.249.223.23 (talk) 00:40, 16 January 2010 (UTC)

True - those numbers actually are the FSB throughput (Transfer rate * Bus width), in MB/s. —Preceding unsigned comment added by 88.66.57.209 (talk) 15:35, 11 March 2010 (UTC)

Ok, this doesn't make sense.

If the front side bus is "the bus that carries data between the CPU and the northbridge", and it is "an aging technology" - this would imply that in newer systems no data is being carried between the CPU and the northbridge. I can't really imagine that to be true. So either the definition is incomplete - the front side bus is one specific method of carrying that data, and then it should be stated which method; or something else is wrong. -- 92.229.92.20 (talk) 21:43, 27 April 2010 (UTC)

The northbridge is the interface to memory; newer CPUs containing HyperTransport or QPI connections have their own memory controller on-die, thus making the northbridge itself obsolete. So in newer systems, the northbridge is inside the CPU and there is no FSB between them anymore. So the definition stated is actually correct. --141.44.162.92 (talk) 11:28, 9 June 2010 (UTC)

The whole context needs to be set better. As far as I can tell, this term was introduced by Intel around the time of the first Pentium products. And it was used in data-center server machines too, so the "personal computer" in the intro is not accurate. It is the manufacturer specific (or architectures that are Intel compatible), not specific to how many users the computer has. And generally needs to be in the past tense, clarifying it was used about 1990-2010 or so. Hard to get sources for this, but better than being vague or misleading. W Nowicki (talk) 17:39, 18 May 2011 (UTC)

Move

The following discussion is an archived discussion of the proposal. Please do not modify it. Subsequent comments should be made in a new section on the talk page. No further edits should be made to this section.

No consensus to move. Vegaswikian (talk) 21:17, 11 June 2011 (UTC)

Front-side bus → Front side bus – Relisted Alpha Quadrant ^talk 21:35, 4 June 2011 (UTC)

What reliable sources use.

It looks like the page was moved about a year ago without any discussion I can find. Intel (who seems to have coined the term) consistently spells it as "front side bus" without any hyphen. http://www.google.com/search?&q=front-side+bus+site:intel.com So I propose we move it back to be consistent with the sources and the way it was for its first three years. Any objections? W Nowicki (talk) 18:12, 27 May 2011 (UTC)

• Support seems to be the WP:COMMONNAME. 65.95.13.213 (talk) 05:15, 28 May 2011 (UTC)
• Oppose: Front-side is a compound modifier of bus and should be hyphenated. –CWenger (^ • @) 21:48, 28 May 2011 (UTC)
  • Not a valid consideration in terms of WP:AT I'm afraid. Andrewa (talk) 06:42, 4 June 2011 (UTC)
    • WP:AT does address things such as capitalization so I can't imagine why proper grammar would not apply as well. –CWenger (^ • @) 08:41, 4 June 2011 (UTC)
      • So make a proposal to this effect and good luck getting it accepted, but meantime I'm afraid it says what it says rather than what you think it should say. Andrewa (talk) 09:36, 4 June 2011 (UTC)
        • My contention is WP:AT doesn't speak to punctuation. Given the new links presented below, however, this seems to be a moot issue, as reliable sources do use a hyphen. –CWenger (^ • @) 16:52, 4 June 2011 (UTC)
          • It doesn't say anything about left-handed smoke shifters either; but it applies to Snipe hunt all the same. Septentrionalis PMAnderson 22:32, 5 June 2011 (UTC)
• Support. Current name appears to be a Wikipedian invention. Andrewa (talk) 06:42, 4 June 2011 (UTC)
• Oppose: Any editor worth her salt would correct this in any text. It's not a side bus. Please let's not confuse readers. Tony (talk) 08:53, 4 June 2011 (UTC)
  • Again, this appears to be asserting that front-side is what English speakers should use rather than what they do use. It's the latter that is the issue in terms of Wikipedia policy. The ambiguity that's avoided by including the hyphen is unfortunate in some ways, but if it's part of English then it's Wikipedia policy not to try to fix this particular sort of ambiguity. It would be different if we wanted to disambiguate from an article on near side-bus, but we don't even have an article on side bus yet. Andrewa (talk) 12:54, 4 June 2011 (UTC)
• Oppose – it is not WP policy to copy errors, even from reliable sources. Besides if you look at books (e.g. this Google books search), most use the hyphen, so this claim that people actually use "front side bus" is way off base. Dicklyon (talk) 16:19, 4 June 2011 (UTC)
• Ignore Tony, Dicklyon (and myself) as unwanted quarrellers. Those two want theit favorite obscure guideline to have all power; I don't; this decision should be left to those actually interested in the readability of the article. For what it is worth, hyphenation in contexts like this was always rare in American English, and has been steadily falling out of use in British English; for now, see WP:ENGVAR, but be prepared to move as this anglicism falls out of use. For what it is worth, a few prominent authors seem to be using "front-side bus" or even "front-side-bus" in the last five years, but looking a little deeper suggests that the bulk of usage does not hyphenate. Since there is no actual ambiguity (there is no side bus to be front) this is unsurprising. Septentrionalis PMAnderson 18:01, 4 June 2011 (UTC)
• Leave it alone. Both terms appear to be in common use [3], and WP:TITLECHANGES says, “If an article title has been stable for a long time, and there is no good reason to change it, it should not be changed.” (Misleading the readers is not an argument, as from the title alone the reader wouldn't be able to tell this is not about a type of road vehicle anyway, and as for “correcting” stuff, go correct some of the stuff listed in Misnomer. :-) ― A. di M.​_plé​^dréachtaí 13:22, 5 June 2011 (UTC)
• Support; common enough usage that we have no compelling reason to avoid the clarity provided by the hyphen. Powers ^T 20:34, 6 June 2011 (UTC)
  • Of course I meant Oppose. Front-side bus is what the title should be. Powers ^T 02:26, 7 June 2011 (UTC)
• Oppose. Heh! What a stupid term, for a start. "Side" and "front" are very often mutually exclusive (think of a house, with a front, a back, and two sides). In such a case the clarity brought by evolved norms of punctuation is especially needed. See my more general remarks in the subsection below. Noetica^Tea? 23:52, 6 June 2011 (UTC)

Common name

This is a discussion section. Please add further "votes" to the section above rather than to here. TIA. Andrewa (talk) 12:54, 4 June 2011 (UTC)

I'm interested that neither of the objections so far dispute the claim that near side bus is the common name. It seems to me that this is the key issue, and that the lack of evidence presented to support this claim is the only apparent weakness in the proposal. At the risk of arguing from silence it appears that there may be no weakness here, that near side may be the common name exactly as claimed. Andrewa (talk) 12:54, 4 June 2011 (UTC)

<sigh>I googled it. The first eight entries are "front-side bus" bar one, which is "frontside bus". Tony (talk) 15:16, 4 June 2011 (UTC)

<sigh some more> Also in Scholarly papers the correct hyphenated form is often used. The fact that this term is also commonly used mis-punctuated is not a reason to so do in WP. If Intel "invented" this generic term in mispunctuated form, that is not a reason for others to adopt bad grammar, and most have not. Especially in books, which have editors who care about such things, as we also do at WP. Dicklyon (talk) 16:24, 4 June 2011 (UTC)

I believe this notion that WP:COMMONNAME supercedes correct punctuation is unprecedented. Am I wrong? Not that it would apply here anyway, since best (book) sources mostly don't use wrong punctuation of front-side bus. Dicklyon (talk) 16:30, 4 June 2011 (UTC)

Yes, of course you are wrong; you should know you are wrong. You participated in a discusion on exactly this issue, four months ago; you argued against the same claim, from a different editor, Wikipedia:Administrators'_noticeboard/IncidentArchive692#Statement_from_Born2cycle a month ago; you claimed the same theory was novel earlier this week. All these are precedents; and all by different editors than this move request. What is unprecedented is your own theory that the policy WP:COMMONNAME doesn't apply to punctuation – but rather a contested section of a non-consensus guideline. That theory is unsupported by any guidance save the say-so of a few editors. Septentrionalis PMAnderson 18:01, 4 June 2011 (UTC)

I didn't mean to question whether the theory had been proposed before, but rather whether there was any precedent for it being accepted. Born2Cycle accepted your theory because he hates en dashes more than you do, but that hasn't really gone anywhere. Is there any precedent of accepting the notion that due to COMMONNAME we should accept in titles punctuations that are either wrong or violate the accepted provisions of the MOS? I don't know of any. Dicklyon (talk) 20:28, 4 June 2011 (UTC)

Accepted by the disruptive minority? No, unfortunarely; such editors never accept anything contrary to their POV, which is why they should be ignored, if not banned. But accepted? Certainly; Dicklyon knows this discussion perfectly well; well enough to misrepresent it to third parties. The clear language of policy and the good of the encyclopedia have coubtless prevailed whenever this invented distinction has not been raised. Septentrionalis PMAnderson 23:25, 4 June 2011 (UTC)

Yes, I know it very well. That was the skirmish in which this theory proposed by you was accepted by an admin who moved the page, leading to a big mess that is being settled now in favor of styling titles the same way as text, per the MOS. Not really very relevant here any more, since the use of normal punctuation in front-side bus has been shown to be common in sources. Dicklyon (talk) 00:18, 6 June 2011 (UTC)

And, much more importantly, by seven other editors concerned with the readability of the page - as this should be settled. Septentrionalis PMAnderson 22:38, 6 June 2011 (UTC)

I do not quite follow the "near side" example; seems like a red herring. Although I was the proposer of the move, let me now propose a compromise. Keep the article title, but explain the difference: "Front Side Bus" (all capitals, no hyphen) was the term coined by Intel. A USPTO search indicates it appears not to be a trademark, although the capitals would suggest they might have treated it like one. Then there is the generic concept of a bus on the front side, which as indicated would be more correctly hyphenated and lower case. That would explain why articles and books often use the generic English term, as opposed to Intel specific. And using "wrong" punctuation is very very common in computer product names, like it or not. Wikipedia has many precedents for using the version from official product literature. Off hand I would point out ThinkPad, iPod, iSCSI, but there are also precedents for using more "correct" forms, although most of those are moving from all caps to normal punctuation. W Nowicki (talk) 17:44, 4 June 2011 (UTC)

This sounds like a good compromise. But it might not be necessary, as companies tend to do this all the time. I guess marketing folks hate hyphens because they incessantly remove them, they must think it makes the term more prominent, along with more capitalization than is normally called for. –CWenger (^ • @) 17:54, 4 June 2011 (UTC)

Hyphenation is often obsolete, and often anglicizes. Computer products are pretentious in different directions from Ye-Olde Inne, and that is just as well, since the inn sign is bad Tudor English too. Septentrionalis PMAnderson 18:05, 4 June 2011 (UTC)

"Front-side bus" is the common name. Tony (talk) 03:11, 5 June 2011 (UTC)

My take, using the present case as an example: The common name is spoken as the three-word construction {front+side+bus}. Normal spelling is applied in writing these three words. That's it: the common name has now been settled.

Next, as a further question, comes punctuation. Here every writer, editor, and publisher applies certain favourite principles. These may sometimes vary, but in the present case well-established practice prefers a hyphen: "front-side bus". The fact that many writers – and even editors and publishers these days – apply a different punctuation is not relevant. It has nothing to do with selecting a common name for Wikipedia titles. WP:TITLE does not touch on punctuation; and reliable sources are frequently anything but reliable for punctuation. Let me explain: Many writers dispense with norms of punctuation (especially hyphens) when the term in question becomes very familiar to them, and no longer needs punctuation for interpreting or clarifying the sense. They lose track of the fact that it is not a familiar term for others. Wikipedia is written for others, not for experts who already know. That's um, ... communication. Noetica^Tea? 23:52, 6 June 2011 (UTC)

The above discussion is preserved as an archive of the proposal. Please do not modify it. Subsequent comments should be made in a new section on this talk page. No further edits should be made to this section.

Well I still do not think it is "settled" just because someone asserts it emphatically. As stated, the term was written as "Front Side Bus" by its coiner not because it was "very familiar to them" at all, but because it was considered a proper name somehat like a trademark (although it never appeared to be actually registered). Will try to explain it in the article. W Nowicki (talk) 00:08, 13 June 2011 (UTC)

It looks like a user who did not participate in the discussion reverted my proposed compromise? I am going to put it back in, since it was sourced to the official description of the term by its coiner. Perhaps the self-referential wording is not needed; anyone reading the article can see it calls it "front-side bus". But refusing to mention what it was originally called is an odd form of censorship. Explaining the origin of the term and its evolution is indeed history, even if a specific editor does not like it. If a reliable source contains information relevant to the topic, it should be included. The reason I started this discussion was to get consensus. If another editor has a counter-proposal (e.g. put it in a footnote) then please discuss. For example, I just did a quick search of the literature and could not find any papers using the hyphenated term before Intel seems to have coined it, but an expert might have a better collection to search. W Nowicki (talk) 17:51, 14 June 2011 (UTC)

Another revert?

It looks like User:Glrx reverted the proposed compromise again without discussion. To recap:

I was looking at improving this article (which was totally unsourced back in May), and noticed that reliable sources were inconsistent with their punctuation and capitalization of the term. Since the move had been done without any discussion, I started one on May 27. The discussion indicated that both "Front Side Bus" and "front-side bus" are used in sources, but the latter is generally more correct English usage. I proposed a compromise of keeping the title but explaining the history of the term as being coined by Intel since I did not have strong feelings either way. We do this kind of thing all the time in biography articles: when more than one name is used, explain the history with sources briefly but otherwise use a name consistently. It is even an issue with technology history terms such as stored-program computer or Von Neumann architecture which change through time.

The move was closed with "no consensus" on June 11. In the meanwhile User:Dicklyon and I made some improvements (I hope!) to the article and added some citations and a diagram. I proposed again my compromise on this talk page on June 12, and added it since nobody objected. The next morning Glrx reverted the cited statement, with the summary "hypen usage is not history; article is not about WP". Could a third party please read the source ftp://download.intel.com/design/intarch/PAPERS/321087.pdf and see if I am imagining it? Read page 6, 9 or 10 for example "The name front side bus, came about when the original L2 cache was added to the CPUs." So that source did seem to me to be relevant to its history, being the closest to an "official" definition of the term. (Although this 2009 document does use lower case in the body, upper case in other places; eventually I was going to add some other sources from earlier periods but they are harder to get. It might be only capital letters when intended as a proper name. see http://www.intel.com/technology/platforms/quickassist/index.htm and http://download.intel.com/support/processors/xeon/sb/25213506.pdf )

I waited more than a day to see if any explanation would be added here. None was. Then on June 14 I added an explicit call for any better wording here, and added another attempt to the article without the self-referential language. I also included another source to an Intel document. I replaced some inline links with full live citations, and fixed some wording that had been discussed on this talk page. Within a few hours, again without any discussion here, Glrx reverted, including removing a citation to an Intel document (which luckily Anomiebot rescued). Glrx then added a template to my talk page warning that I could be banned for making "more than three reversions on a single page within a 24-hour period" because I was Wikipedia:Edit warring. However, that guideline clearly states that edit wars are when editors are not "trying to resolve the disagreement by discussion". It also says: "avoid relying solely on edit summaries and discuss the matter on the article's talk page." Could I have a third opinion on if I was trying in good faith to resolve by discussion? Also who was doing the reverting, and who was doing constructive edits that made the article agree with reliable sources? The edit summary on the revert was "article not moved; revert WP:POINTmaking; no need to explain punctuation". That guideline states it should be only invoked for disruptive edits. Is is disruptive to make article information consistent with sources? Or is removing well-cited content disruptive? Not even sure what "point" it was supposed to be making. It was just trying to add accurate verifiable content based on the discussion here. Certainly technical information should be the major content to this article, but one short sentence describing the evolution of the term from a proprietary proper noun to a generic term might be interesting to more general readers.

That guideline says "If direct discussion fails to resolve a problem, look into dispute resolution." And that suggestion seems reasonable. I would appreciate help to get this (I thought minor) issue behind us and move on to more improvements to content. W Nowicki (talk) 18:28, 15 June 2011 (UTC)

Oppose discussing hypenation or capitalization in the main article. Earlier, you proposed moving the article to the unhypenated name. There was no consensus for that move. You voiced your continued disagreement with not moving the article in the then-closed section. The material you added to the main article was more about the punctuation rather than the origin of the name. My edit summaries were that the article should not cover a minor matter such as WP's choice about punctuation. What significance is there in the loss of the hypen? Why would somebody who reads the article care? Your addition did, however, elevate an issue about which you are both interested (proposing the move) and unhappy (commenting after move did not achieve consensus). Apparently you also want to add material about capitalizing the term. If you can gain consensus, then you can the material. -- Glrx (talk) 19:22, 15 June 2011 (UTC)

No, please do not assume bad faith and make assumptions about an editor's emotions. I never said I was "unhappy" with keeping the title in place. If you look at my history, I am almost always in favor of minmizing wasted moves back and forth. I just wanted to have the discussion, and from experience know that closing a discussion due to "no consensus" is very different than having a matter "settled". Things are rarely settled on Wikipedia; we should remain open-minded in my opinion. I was commenting on how the article is incomplete and misleading. A few readers might actually be interested in more than a litany of Megahertz and we should not presume to know what is important to them or not. See below. W Nowicki (talk) 16:53, 16 June 2011 (UTC)

I agree with Glrx. Almost any multi-word technical term can be commonly found mis-punctuated and/or in title case in a number of sources, especially when it's being promoted by its originator or used to define an acronym. In WP, we don't do it that way. It's really not worth commenting on in an article on the topic. Dicklyon (talk) 19:43, 15 June 2011 (UTC)

Well yes, finally a reasonable argument. Especially now that I realize that sources show Intel tacked on the term as part of their product names. For example a "Xeon Processor with 533 MHz Front Side Bus at 2 GHz" might be a very different product than the "Xeon Processor with 400 MHz Front Side Bus at 2 GHz". Even this might be interesting to note; not all readers are engineers. I hear some people even care about marketing names. Some are even linguists. People who already understand the term will probably be less likely to read it than whose who have no clue what it is. Punctuation is clearly a detail, which is why it was stated merely in passing. I do not see such a horrible evil in mentioning it so briefly, but if someone had suggested removing punctuation details but keeping the discussion of the evolution of the term to be generic, that would have been a fine alternative I would have supported. (Certainly wish it would have been expressed earlier but we all have time constraints.)

The more fundamental problem is that the article after the reversions still confuses the general concept with specific implementations of that concept by Intel in the 1990s-2000s. Computers existed before Intel and will (I hope) exist after Intel is gone. The article does not even say how many versions of the Intel implementations there were that differed in more than clock rate. Another example: the table lists "64-bit" for al the bus widths. This is also a detail, and probably deserves mentioning, although might be better in one or two lines of prose, and with sources cited, but I digress. Someone could, in theory at least, implement a wider front-side bus with 128 bits, or a cheaper one with 32 bits, or whatever. Although certainly they might call it some strange name like the "FroNT+side+bUS" since the hyphen has a negative connotation. :-) W Nowicki (talk) 16:53, 16 June 2011 (UTC)

Add FSB Speed to tables?

After looking for information and to learn about FSB speeds, I came across this page. It took me some time to realize that the page wasn't outdated. The first thing that gets my attentions are tables and graphics, so when looking at the Intel table I just saw values up to 400 MHz, so therefore I was convinced that this information was quite old. After a while I finally realized that the values in the FSB Clock column is not the same as the FSB Speed used "normally". In this case I was looking at CPU and memory for some older Dell servers. My suggestion to clarify this is to add a column to the tables with the FSB speeds labeled "FSB Speed (MT/s)", but with MHz used in the cells. Dell mentions this as "Front-side bus (external) speed" (see example here). Any objections? /PatrikN (talk) 22:27, 24 November 2012 (UTC)

The Concept of Front Side Bus Should Come with Time

The name, Front Side Bus (FSB), is essentially neutral. If a bus is able to connect CPU onto the mainboard, it should be called a Front Side Bus, no matter whether there would be a centric bridge chip (North Bridge) serving for it. Contrast to it, if a bus redirect its connection back its own physical package without indirectly extending out, it could be called a Back Side Bus (BSB), without having to connecting cache related devices. This concept should come with time, as technologies advancing... GoldenQR (talk) 22:18, 4 September 2015 (UTC)

Semi-protected edit request on 12 February 2016

Please update link of 2nd reference of "EV6" text to "EV6" - its current link is stale. The first link to "Athlon" page is valid if indirect. Typo369 (talk) 09:20, 12 February 2016 (UTC)

Done EvergreenFir (talk) Please {{re}} 18:47, 12 February 2016 (UTC)

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