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Summary
| Description |
English: The IDT R30xx family is a series of high-performance 32-bit microprocessors featuring a high-level of integration, and targeted to high-performance but cost sensitive processing applications. The R30xx family is designed to bring the high-performance inherent in the MIPS RISC architecture into low-cost, simplified, power sensitive applications. Thus, functional units have been integrated onto the CPU core in order to reduce the total system cost, rather than to increase the inherent performance of the integer engine. Nevertheless, the R30xx family is able to offer over 40 MIPS of integer performance at 50 MHz without requiring external SRAM or caches.
The R3071 and R3081 extend the capabilities of the R30xx family by integrating additional resources into the same pin-out. The R3071 and R3081 thus extend the range of applications addressed by the R30xx family, and allow designers to implement a single, base system and software set capable of accepting a wide variety of CPUs, according to the price performance goals of the end system. The R3081, incorporates a 16kB instruction cache, a 4kB data cache, but uses the simpler memory mapping of the R3051/52, and thus omits the TLB. The cache on the R3081 is user configurable to 8kB ICache and 8kB D-Cache. The R3081 also includes an on-chip floating point accelerator. Die size: 8.4 x 6.3 mm |
| Date | |
| Source | Own work |
| Author | Antoinebercovici |
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 16:11, 26 April 2014 | | 2,888 × 1,460 (2.87 MB) | Antoinebercovici | User created page with UploadWizard |
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